Signal Name Total Product Terms Product Terms Location Power Mode Pin Number PinType Pin Use
happy_a12 3  1_1 1_2 1_3 MC1 LOW   (b) (b)
(unused) 0   MC2   23 I/O/GCK2 I
(unused) 0   MC3     (b)  
(unused) 0   MC4     (b) (b)
io_1050 7  4_1 5_1 5_2 5_3 5_4 5_5 6_3 MC5 LOW 24 I/O O
turbo_rom_adr<12> 2  6_1 6_2 MC6 LOW 25 I/O I
turbo_rom_adr<11> 2  7_1 7_2 MC7 LOW   (b) (b)
rom_bank_c000_0__or0000/rom_bank_c000_0__or0000_D2 2  8_1 8_2 MC8 LOW 27 I/O/GCK3 GCK/I
ram_rom_adr<11> 9  10_3 10_4 8_3 8_4 9_1 9_2 9_3 9_4 9_5 MC9 LOW 28 I/O O
ram_bank_5 2  10_1 10_2 MC10 LOW   (b) (b)
ram_rom_adr<8> 2  11_1 11_2 MC11 LOW 29 I/O O
ram_bank_4 2  12_1 12_2 MC12 LOW 30 I/O I
i2c_data 3  13_1 13_2 13_3 MC13 LOW   (b) (b)
i2c_clk 3  14_1 14_2 14_3 MC14 LOW 32 I/O I
(unused) 0   MC15   33 I/O I
(unused) 0   MC16     (b) (b)
ram_rom_adr<12> 22  15_1 15_2 15_3 15_4 15_5 16_1 16_2 16_3 16_4 16_5 17_1 17_2 17_3 17_4 17_5 18_1 18_2 18_3 18_4 18_5 1_4 1_5 MC17 LOW 34 I/O O
(unused) 0   MC18     (b) (b)

Signals Used By Logic in Function Block
  1. $OpTx$FX_DC$475
  2. $OpTx$FX_DC$515
  3. $OpTx$FX_SC$520
  4. N104/N104_D2
  5. data<6>.PIN
  6. data<5>.PIN
  7. data<4>.PIN
  8. N27/N27_D2
  9. adr<0>
  10. adr<10>
  11. adr<11>
  12. adr<12>
  13. adr<13>
  14. adr<14>
  15. adr<15>
  16. adr<1>
  17. adr<2>
  18. adr<3>
  19. adr<7>
  20. adr<8>
  21. adr<9>
  22. archiver_a11
  23. check_1050_6810_access_mux0001/check_1050_6810_access_mux0001_D2
  24. data_0_cmp_eq0001/data_0_cmp_eq0001_D2
  25. floppy_mode<0>
  26. floppy_mode<1>
  27. floppy_mode<2>
  28. floppy_mode<3>
  29. happy_a12
  30. happy_a12__or0001/happy_a12__or0001_D2
  31. i2c_clk
  32. i2c_clk_and0000/i2c_clk_and0000_D2
  33. i2c_data
  34. ram_bank_4
  35. ram_bank_5
  36. reset
  37. rom_base_bank_0
  38. rom_source_is_ram
  39. rw
  40. turbo_rom_adr<11>
  41. turbo_rom_adr<12>
  42. turbo_rom_adr_11__or0001/turbo_rom_adr_11__or0001_D2