FB1
FB2
FB3
FB4
FB5
FB6
FB7
FB8
Signal Name
Total Product Terms
Product Terms
Location
Power Mode
Pin Number
PinType
Pin Use
floppy_mode<0>
2
1_1
1_2
MC1
LOW
(b)
(b)
track_lo<3>
7
1_3
2_1
2_2
2_3
2_4
2_5
3_3
MC2
LOW
87
I/O
O
N64/N64_D2
2
3_1
3_2
MC3
LOW
(b)
(b)
$OpTx$FX_SC$520
2
4_1
4_2
MC4
LOW
(b)
(b)
track_lo<2>
6
4_3
5_1
5_2
5_3
5_4
5_5
MC5
LOW
89
I/O
O
track_lo<1>
7
6_1
6_2
6_3
6_4
6_5
7_3
7_4
MC6
LOW
90
I/O
O
$OpTx$FX_DC$475
2
7_1
7_2
MC7
LOW
(b)
(b)
track_lo<0>
7
8_1
8_2
8_3
8_4
8_5
9_3
9_4
MC8
LOW
91
I/O
O
$OpTx$FX_DC$461
2
9_1
9_2
MC9
LOW
92
I/O
I
N27/N27_D2
3
10_1
10_2
10_3
MC10
LOW
(b)
(b)
N2/N2_D2
3
11_1
11_2
11_3
MC11
LOW
93
I/O
I
ram_rom_adr<18>
5
12_1
12_2
12_3
12_4
12_5
MC12
LOW
94
I/O
O
N11/N11_D2
3
13_1
13_2
13_3
MC13
LOW
(b)
(b)
ram_rom_adr<17>
4
14_1
14_2
14_3
14_4
MC14
LOW
95
I/O
O
ram_rom_adr<16>
4
15_1
15_2
15_3
15_4
MC15
LOW
96
I/O
O
$OpTx$FX_DC$492
3
16_1
16_2
16_3
MC16
LOW
(b)
(b)
ram_rom_adr<15>
4
17_1
17_2
17_3
17_4
MC17
LOW
97
I/O
O
check_1050_6810_access_mux0001/check_1050_6810_access_mux0001_D2
5
18_1
18_2
18_3
18_4
18_5
MC18
LOW
(b)
(b)
Signals Used By Logic in Function Block
$OpTx$FX_DC$461
$OpTx$FX_DC$475
$OpTx$FX_DC$517
$OpTx$FX_DC$554
N104/N104_D2
N11/N11_D2
data<3>.PIN
data<2>.PIN
data<1>.PIN
data<0>.PIN
N64/N64_D2
adr<0>
adr<12>
adr<13>
adr<14>
adr<15>
adr<1>
floppy_mode<0>
floppy_mode<1>
floppy_mode<2>
floppy_mode<3>
floppy_mode_0__or0000/floppy_mode_0__or0000_D2
ram_bank_2
ram_bank_3
ram_bank_4
ram_bank_5
reset
rom_bank_c000_2
rom_bank_c000_3
rom_bank_c000_4
rom_bank_c000_5
rom_bank_c000_enable<0>
rom_base_bank_3
rom_base_bank_4
rom_base_bank_5
rom_base_bank_6
rom_source_is_ram
rw
track_lo<0>
track_lo<1>
track_lo<2>
track_lo<3>